rev 2.0 ?2011 advanced linear devices, inc. 415 tasman drive, sunnyvale, ca 94089-1706 tel: (408) 747-1155 fax: (408) 747-1286 www.aldinc.com complementary n-channel and p-channel mosfet general description the ald1115 is a monolithic complementary n-channel and p-channel transistor pair intended for a broad range of analog applications. these enhancement-mode transistors are manufactured with advanced linear devices' enhanced acmos silicon gate cmos process. it consists of a n-channel mosfet and a p-channel mosfet in one package. the ald1115 is a dual version of the quad complementary ald1105. the ald1115 offers high input impedance and negative current temperature coefficient. the transistor pair is designed for precision signal switching and amplifying applications in +1v to +12v systems where low input bias current, low input capacitance and fast switching speed are desired. since these are mosfet devices, they feature very large (almost infinite) current gain in a low frequency, or near dc, operating environment. when connected in parallel with sources, drains and gates connected together, a cmos analog switch can be constructed. in addition, the ald1115 is intended as a building block for cmos inverters, differential amplifier input stages, transmission gates, and multiplexer applications. the ald1115 is suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources. the high input impedance and the high dc current gain of the field effect transistors result in extremely low current loss through the control gate. the dc current gain is limited by the gate input leakage current, which is specified at 30pa at room temperature. v+ is connected to the substrate, which is the most positive voltage potential of the ald1115, usually sp (5). similarly, v- is connected to the most negative voltage potential of the ald1115, usually sn (1). features ? thermal tracking between n-channel and p-channel ? low threshold voltage of 0.7v for both n-channel and p-channel mosfets ? low input capacitance ? high input impedance -- 10 13 w typical ? low input and output leakage currents ? negative current (i ds ) temperature coefficient ? enhancement mode (normally off) ? dc current gain 10 9 ? single n-channel mosfet and single p-channel mosfet in one package ald1115 a dvanced l inear d evices, i nc. pin configuration applications ? precision current mirrors ? complementary push-pull linear drives ? discrete analog switches ? analog signal choppers ? differential amplifier input stage ? voltage comparator ? data converters ? sample and hold ? analog current inverter ? precision matched current sources ? cmos inverter stage ? diode clamps ? source followers block diagram * contact factory for leaded (non-rohs) or high temperature versions. ordering information ("l"suffix for lead free version) operating temperature range* 0 c to +70 c0 c to +70 c 8-pin 8-pin soic plastic dip package package ald1115sal ald1115pal gp sp gn sn 1 2 3 4 top view sal, pal packages 5 dn v + v - dp 6 7 8 sn (1) v - (4) dn (3) gn (2) sp (5) v + (8) dp (7) gp (6)
ald1115 advanced linear devices 2 of 8 drain-source voltage, v ds 10.6v gate-source voltage, v gs 10.6v power dissipation 500 mw operating temperature range sal, palpackages 0 c to +70 c storage temperature range -65 c to +150 c lead temperature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment. gate threshold v t 0.4 0.7 1.0 v i ds = 1 m a v gs = v ds -0.4 -0.7 -1.0 v i ds = -1 m a v gs = v ds voltage gate threshold temperature tc vt -1.2 mv/ c -1.3 mv/ c drift on drain i ds (on) 3 4.8 ma v gs = v ds = 5v -1.3 -2 ma v gs = v ds = -5v current trans-. g fs 1 1.8 mmho v ds = 5v i ds = 10ma 0.25 0.67 mmho v ds = -5v i ds = -10ma conductance output g os 200 m mho v ds = 5v i ds = 10ma 40 m mho v ds = -5v i ds = -10ma conductance drain source r ds(on) 350 500 w v ds = 0.1v v gs = 5v 1200 1800 w v ds = -0.1v v gs = -5v on resistance drain source bv dss 10 v i ds = 1 m a v gs =0v -10 v i ds = -1 m a v gs =0v breakdown voltage off drain i ds(off) 10 400 pa v ds =10v i gs = 0v 10 400 pa v ds = -10v v gs = 0v current 4 na t a = 125 c4nat a = 125 c gate leakage i gss 0.1 30 pa v ds = 0v v gs =10v 1 30 pa v ds = 0v v gs =-10v current 1 na t a = 125 c1nat a = 125 c input c iss 1 3 pf 1 3 pf capacitance operating electrical characteristics t a = 25 c unless otherwise specified n - channel test p - channel test parameter symbol min typ max unit conditions min typ max unit conditions absolute maximum ratings
ald1115 advanced linear devices 3 of 8 typical p-channel performance characteristics output characteristics
drain source voltage (v) drain source current
(ma)
-10 -7.5 -5.0 -2.5 0 v bs = 0v
t a = 25 c
-10v -8v -6v -4v -2v 0-8 -2 -6 -4 -10 -12 v gs = -12v low voltage output
characteristics
drain source voltage (mv)
drain source current
( a)
-320 -160 0 160 320
-500 500 250 0 -250
-4v v gs = -12v -6v v bs = 0v
t a = 25 c
-2v -12 forward transconductance
vs. drain source voltage
drain source voltage (v) 0-8 -2 -6 -4 -10
forward transconductance
(mmho)
1.0 0.5 0.2 0.1 0.05 0.02 0.01
v bs = 0v
f = 1khz
i ds = -5ma t a = +125 c t a = +25 c i ds = -1ma transfer characteristic
with substrate bias
gate source voltage (v) 0 -0.8 -1.6 -2.4 -3.2 -4.0 -20 -15 -10 -5 0 drain source current
( a)
v bs = 0v 4v
6v
8v
10v
12v v gs = v ds
t a = 25 c 2v gate source voltage (v) drain source on resistance
r ds (on) vs. gate source voltage drain source on resistance
(k )
100 10 1 0.1 -2 0 -4 -6 -8 -10 -12 v ds = 0.4v
v bs = 0v
t a = +125 c
t a = +25 c off drain current vs.
ambient temperature ambient temperature ( c) off drain source current
(pa)
-50 -25 +25 +50 +75 +125 +100 0 v ds = -12v
v gs = v bs = 0v
1 10 100 1000
ald1115 advanced linear devices 4 of 8 typical n-channel performance characteristics output characteristics drain source current
(ma)
20 15 10 0 5
v bs = 0v
t a = 25 c
v gs = 12v 10v 8v 6v 4v 2v
drain source voltage (v) 02 4 681012 low voltage output
characteristics
drain source voltage (mv)
drain source current
( a)
-160 -80 0 80 160 -1000 1000 500 0 -500
4v v gs = 12v 6v v bs = 0v
t a = 25 c
2v
forward transconductance
(mmho)
forward transconductance
vs. drain source voltage
drain source voltage (v) 20 10 2 1 0.5 5 0.2
02 4 681012 i ds = 1ma t a = +25 c i ds = 10ma t a = +125 c v bs = 0v
f = 1khz
gate source voltage (v) transfer characteristic
with substrate bias
drain source current
( a)
20 15 10 5 0 0 0.8 1.6 2.4 3.2 4.0
v bs = 0v -2v -4v -6v -8v -10v -12v v gs = v ds
t a = 25 c
gate source voltage (v) drain source on resistance
r ds (on) vs. gate source voltage drain source on resistance
(k )
100 10 1 0.1 2 0 4 6 8 10 12 v ds = 0.2v
v bs = 0v
t a = +25 c t a = +125 c off drain current vs.
ambient temperature ambient temperature ( c) off drain source current
(pa)
-50 -25 +25 +50 +75 +125 +100 0 v ds = +12v
v gs = v bs = 0v
1 10 100 1000
ald1115 advanced linear devices 5 of 8 cmos inverter cmos analog switch current source mirror current source with gate control typical applications i set r set q 3 v + = +5v i source q 1 , q 2 : n - channel mosfet
q 3 , q 4 : p - channel mosfet i source = i set = v + -vt r set = 4 r set ~ q 1 q 2 v + = +5v q 4 v + = +5v q 4 i source r set q 1 q 3 i set on off digital logic control
of current source q 1 : n - channel mosfet
q 3, q 4 : p - channel mosfet v + in out control control v + in out
ald1115 advanced linear devices 6 of 8 cascode current sources source follower diode-connected configuration typical applications (cont.) i set v + = +5v q 2 i source r set q 3 q 1 q 1 , q 2 , q 3 , q 4 : n - channel mosfet
(1/2 ald1105 ald1116) q 4 i set v + = +5v q 1 q 3 q 2 q 4 i source q1, q2, q3, q4: p - channel mosfet
i source = i set = v + - 2vt r set = 3 r set ~ r set out in r a r b v + v + v out = v + - v ds r v out = v ds r v +
ald1115 advanced linear devices 7 of 8 8 pin plastic soic package soic-8 package drawing millimeters inches min max min max dim a a 1 b c d-8 e e h l s 1.75 0.25 0.45 0.25 5.00 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.185 0.140 0.224 0.024 0 0.010 0.069 0.010 0.018 0.010 0.196 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 4.69 3.50 5.70 0.60 0 0.25 l c h s (45 ) e a a 1 b d s (45 ) e
ald1115 advanced linear devices 8 of 8 8 pin plastic dip package pdip-8 package drawing b 1 s b e e 1 d e a 2 a 1 a l c e 1 millimeters inches min max min max dim a a 1 a 2 b b 1 c d-8 e e 1 e e 1 l s-8 3.81 0.38 1.27 0.89 0.38 0.20 9.40 5.59 7.62 2.29 7.37 2.79 1.02 0 5.08 1.27 2.03 1.65 0.51 0.30 11.68 7.11 8.26 2.79 7.87 3.81 2.03 15 0.105 0.015 0.050 0.035 0.015 0.008 0.370 0.220 0.300 0.090 0.290 0.110 0.040 0 0.200 0.050 0.080 0.065 0.020 0.012 0.460 0.280 0.325 0.110 0.310 0.150 0.080 15
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